The present invention relates to a method of fabricating a semiconductor device incorporating an interconnect layer of aluminium or aluminium alloy and in particular relates to such a method in which contacts in the form of plugs or vias are formed over the interconnect layer.
In semiconductor processing technology it is well known that the step coverage obtained with conventional metallisation processes for the fabrication of contacts in the form of plugs and vias using metals such as aluminium can become a problem as the dimensions of the contacts are reduced below about 1.5 microns. The reduced step coverage tends to increase the specific contact resistivity of the contacts and the reliability of the contacts is reduced. Poor step coverage also tends to prevent vertical stacking of the contacts over contacts in the previous interconnect layer. Metal step coverage can be increased by reducing the thickness of the dielectric layer in which the contact is formed. However, this can consequently increase the capacitance between the two layers of metal which tends to produce a reduction in the speed of the resultant semiconductor device.
It is known, in an attempt to overcome this step coverage problem with conventional metallisation, to employ tungsten plug technology in which a contact hole is filled with tungsten by a chemical vapour deposition process to form a contact in the form of a plug or via. The two general tungsten deposition processes which are employed are blanket tungsten deposition followed by an etch back so as to leave tungsten contacts in a dielectric layer or selective tungsten deposition in which tungsten is selectively deposited in contact holes formed in the dielectric layer. The blanket deposition and etch back process suffers from a number of disadvantages such as the requirement to deposit a conformal adhesion layer to enable the tungsten layer to adhere to the underlying dielectric layer; the requirement for an additional etch back process; the difficulty of filling contacts of differing width; and the constraints on scaling the process to reduce the dimensions of the resultant contact structure. The selective tungsten plug deposition process does not suffer from these problems and accordingly the selective tungsten deposition has advantages over the blanket deposition and etch back process. Tungsten plugs, with low contact resistances, can be grown selectively on a variety of substrates including silicon, tungsten, titanium, titanium nitride and silicides. Aluminium and aluminium alloys are widely used to form a low resistance interconnect layer in semiconductor devices. However, selective tungsten growth on aluminium or aluminium alloys suffers from a very high specific contact resistance. This is in part due to the presence of an insulating aluminium oxide layer on the surface of the aluminium. The aluminium is covered by an insulating native oxide layer which cannot easily be removed before the selective tungsten deposition process. If the oxide layer is removed, for example by physical bombardment in a vacuum or by reactively etching the aluminium metal can also inadvertently be removed but this tends to leave pieces of aluminium or aluminium oxide over the surface of the dielectric layer which act as nucleation sites for the selective tungsten deposition.
The exposed aluminium also tends to form an insulating aluminium fluoride layer when exposed to the fluorine chemistry at an elevated temperature in the selective tungsten deposition process. This reaction competes with the reaction to form selective tungsten in the early stages of deposition and can result in the formation of the insulating layer between the aluminium and tungsten.
Thus there is a need for a process which enables tungsten contacts selectively to be grown in a reliable manner so as electrically to connect to an aluminium or aluminium alloy interconnect layer. The present invention aims to satisfy this need.